chopper circuits(power electronics)

Object

To study the chopper circuit through simulation

Apparatus used

Computer

Theory and formula used

Let f be the frequency of switching of transistor switch, V_s is the DC source voltage: R L and E be the load resistance, inductance, and the back EMF of a DC machine (The battery voltage for a battery load) load respectively.

When transistor is ON (Mode 1)

V_o=V_s

When transistor is OFF but the chopper is in continuous current conduction mode (Mode 3)

Mode 1 (Calculation of maximum current in the discontinuous current mode)

Mode 2 (Calculation of maximum turn on time for discontinuous conduction)

Where :

At the boundary of continuous and discontinuous current mode

just at giving

At

Simplifying the equation:

Putting frequency f = 1/T

For L=1mH,R=0.5Ω,f=500 Hz and V_s=250V

Expressions for Discontinuous Current Conduction Mode

For Discontinuous Current Conduction Mode for ON period of transistor using Eq.1

At t = 0, i=I₂

At t=T_on, I = I₁ =

At t=T_on,

For OFF period transistor using Eq.2

At t=T_on, I = I₁ while I = I₂ at t=T

Therefore,

Substituting the value of I₂ in the expression of I₁

Similarly substituting the value of I₁ in the expression for I₂

single phase series and parallel invertor(power electronics)

EXPERIMENT NO: 1

Object

To study the single phase series and parallel Inverter.

Apparatus

1. Single phase series inverter kit (10 V/2 Amp)

2. D.C. Power supply (11V/2 Amp)

3. Firing circuit

4. CRO

5. Load

Theory

Basic Series Inverter Circuit

Fig.1 shows the circuit of a series inverter. The commutating elements L and C are such that R, L and C form an under damped circuit. The capacitor has an initial voltage E_c, Thyristor Th₁ is turned on first by an external pulse. Since Th₁ is already forward biased (due to dc voltage V), Th₁ starts conducting and a current I flows in the circuit through Th₁, C, L and load.

Because of under damped nature of the circuit the current is not constant but has the wave shapes as shown in fig.2. It rises to maximum value and then decreases to zero. When the current is at its peak value, the voltage across capacitor is nearly equal to supply voltage V. After this the current starts decreasing but the voltage across the capacitor continues to increase as it is still getting charged. When the current becomes zero the voltage across capacitor is maintained at V+E_c. The voltage across L is zero. The time interval ab must be more than time t_off of the thyristor. This is necessary to ensure that the stored charges in Th1 are reduced to zero so that at point b Th1 is in completely off state. At point b when Th₂ is turned on by an external gate pulse the anode of Th₂ is positive (with respect to cathode) due to charge on capacitor Th₂ starts conducting. The capacitor discharges and the current I flows through the circuit in the direction opposite to that in the start. The current reaches its negative peak value and then decreases to zero at point c when Th₂ is turned off. The above sequence of operation is repeated in the next cycle when Th1 is turned on. The frequency of the output voltage is –

Hz

Where T/2 is the time period of oscillation and Toff the time gap between turn off of one thyristor and turn on of the second thyristor, Also

When Th1 is turned on, KVL equation is

Where Ec is the initial voltage across capacitor,

Taking laplace transform

Since the circuit is under damped, the solution of above equation is

Where –

	Th1
					L
			EC

					C

Fig 1.

This series inverter circuit has the following drawbacks:--

1.) The maximum possible frequency is limited to the damped frequency of oscillation, i.e. . This is due to the fact that Th1 must be turned off before Th2 is turned on. Otherwise the supply voltage V will be short circuited.

2.) When frequency is less than the damped frequency, the distortion of the output voltage waveform is high because Toff is larger in comparison with ON time of thyristor.

3.) The circuit components carry load current continuously. The capacitor supplies the load current in every negative half cycle. Thus the current rating of the commutating elements L and C is high.

4.) The source supply the load intermittently (only during positive half cycle). Therefore source should have a high harmonic content.

5.) The maximum load current depends on the load resistance. Therefore, output regulation of the inverter is poor.

The drawbacks 1 and 5 can be removed by modifications of the circuit.

Modified Series Inverter:-

Fig. 3 shows a modified series inverter. It has two mutually coupled and exactly similar inductors L₁ and L₂. when Th₁ is turned on, the current I₁ begin to increase in the positive half cycle, the voltage across the inductor L₁ will be positive with polarity as shown. This voltage induced across L1 will add to the capacitor voltage in reverse biasing Th2. The circuit conditions and analysis is exactly the same as incase of simple inverter. The advantage in having two inductors is that Th2 can be turned on even before Th₁ has turned off. Thus the output frequency can be adjusted to a higher value because time T_off in fig 2 can be eliminated, In fig 1 this action results in short circuit is avoided because of the presence of inductors L₁ and L₂. If Th₂ is turned on just before turning off of Th₁ the voltage across capacitor C would be somewhat less than the maximum value V+Ec and the current I, will be near to its zero value. Therefore, a voltage equal to capacitor voltage minus the voltage across load will appear across L₂ since L₁ is mutually coupled with L₂ the same voltage will be induced across L₁ also, thus the cathode of Th₁ will be raised to a higher voltage than the anode and Th1 will be turned off. A similar action will reverse bias Th₂ at the end of negative cycle and turn it off. Thus the time interval T_off can be avoided giving a higher output frequency.

Fig 4 shows a further improvement in the series inverter. This circuit uses two mutually coupled inductors and two capacitors. In this circuit power is drawn from the source battery during both half cycles. Thus the intermittent operation of battery is avoided.

Assume that initial charge across C2 is Ec with polarity as shown. Capacitor C1 will be charged to V+Ec in the opposite direction. When Th1 is turned on, the load current iL will have two parallel paths.

Current i1 will flow from battery, through Th1, L1, load and C2. The current i2 will flow from upper plate of C1, through Th1, L1 and load. The driving voltage V+Ec and circuit elements for the currents i1 and i2 are exactly similar. Therefore, current i1 and i2 are equal. At the end of positive half cycle the load current iL would be zero and Th1 would be turned off. Voltage across capacitors would be reversed. An exactly similar operation would occur in the negative half cycle. In each half cycle the load current would be supplied by battery and the other half by one of the capacitors. The maximum forward off state voltage across each thyristor is V+Ec and the peak reverse voltage is Ec.

The waveforms are shown in fig 5.

LOAD

PRECAUTIONS

If the inverter frequency increases above the resonant frequency of the power circuit commutation will fail. Then switch off the dc supply, reduce the inverter frequency and try it again if you do not get the results, check the input fuse and try again.